Question
Which of the following digital logic families has the lowest power consumption?
Answer Options
- A) Schottky TTL
- B) ECL
- C) NMOS
- D) CMOS
Correct Answer: D
Explanation
Digital logic families are characterized by their speed, power consumption, and noise immunity. For portable, battery-operated, and low-power applications, minimizing quiescent power draw is essential. Logic families like TTL and ECL consume significant power even when idle because current flows constantly through the internal pull-up and pull-down resistors.
CMOS (Complementary Metal-Oxide-Semiconductor) logic has the lowest power consumption. CMOS gates are designed so that the P-channel and N-channel MOSFETs are only momentarily on during the switching transition. In the stable logic ‘1’ or ‘0’ state, there is virtually no DC current flowing between the power rails, leading to extremely low static power consumption.
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